Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 other than for a single M.2 slot but the CPU does support it if they build the board to the required spec (electrical trace signal integrity, power delivery, whatever) and enable it in firmware. IIRC A620, B650, and X670 series chipsets are all the same chip (PROM21) with double packaging for the higher tier (two PROM21 chips), which is why compared to B650 the X670 chipset has exactly two times the chipset based USB and SATA controllers.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. Certain motherboard makers each generation will enable features not officially supported on certain motherboard tiers and AMD will force them to issue a bios update that disables the features to maintain product segmentation.
Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 but the CPU does support it if they build the board to the required spec (electrical trace signal integrity) and enable it in firmware. The main PCIE16X slot is directly controlled to the CPU and not through the chipset.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. The additional PCIE lanes added by the chipset are via a switch and I personally don’t count due to the inherent bottleneck.
IIRC different B650/X670 series chipsets aren’t even using different silicon but instead are double packaged for the higher tier, which is why the X670 chipset has exactly two times the chipset based USB and SATA controllers.
Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 on anything other than a single M.2 slot but the CPU does support it if they build the board to the required spec (electrical trace signal integrity, power delivery, whatever) and enable it in firmware. IIRC A620, B650, and X670 series chipsets are all the same chip (PROM21) with double packaging for the higher tier (two PROM21 chips), which is why compared to B650 the X670 chipset has exactly two times the chipset based USB and SATA controllers. So I assume the required PCIE5 redrivers are all there.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. Certain motherboard makers each generation will enable features not officially supported on certain motherboard tiers and AMD will force them to issue a bios update that disables the features to maintain product segmentation.
Some B650 boards can have m.2 pcie5 slot. B650E - m.2 and pcie x16 gen5 Mine B650M aorus elite ax (rev. 1.0) in spec has only m.2 gen.5
Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 other than for a single M.2 slot but the CPU does support it if they build the board to the required spec (electrical trace signal integrity, power delivery, whatever) and enable it in firmware. IIRC A620, B650, and X670 series chipsets are all the same chip (PROM21) with double packaging for the higher tier (two PROM21 chips), which is why compared to B650 the X670 chipset has exactly two times the chipset based USB and SATA controllers.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. Certain motherboard makers each generation will enable features not officially supported on certain motherboard tiers and AMD will force them to issue a bios update that disables the features to maintain product segmentation.
Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 but the CPU does support it if they build the board to the required spec (electrical trace signal integrity) and enable it in firmware. The main PCIE16X slot is directly controlled to the CPU and not through the chipset.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. The additional PCIE lanes added by the chipset are via a switch and I personally don’t count due to the inherent bottleneck.
IIRC different B650/X670 series chipsets aren’t even using different silicon but instead are double packaged for the higher tier, which is why the X670 chipset has exactly two times the chipset based USB and SATA controllers.
Yeah. AMD doesn’t require motherboard makers to build B650 motherboards to the specs required for PCIE 5.0 on anything other than a single M.2 slot but the CPU does support it if they build the board to the required spec (electrical trace signal integrity, power delivery, whatever) and enable it in firmware. IIRC A620, B650, and X670 series chipsets are all the same chip (PROM21) with double packaging for the higher tier (two PROM21 chips), which is why compared to B650 the X670 chipset has exactly two times the chipset based USB and SATA controllers. So I assume the required PCIE5 redrivers are all there.
Last I checked, Ryzen CPUs are still a true SOC with things like PCIE controllers, memory controllers, and standard IO being on the CPU itself rather than the motherboard chipset. Certain motherboard makers each generation will enable features not officially supported on certain motherboard tiers and AMD will force them to issue a bios update that disables the features to maintain product segmentation.